Job Description

ASIC RTL DESIGN ENGINEER (5 to 10 Years) IP/SoC Design Company: ACL Digital (Wafer space Semiconductor) Location [Bangalore/Pune/Chennai/Noida] Experience: 5 to 10 Years Openings: 4 Positions Job Description Sr RTL Design Engineer We are seeking a seasoned RTL Design Engineer with a strong background in microarchitecture and RTL coding. The ideal candidate will play a key role in designing state of the art solutions for automotive camera and display systems. Responsibilities Microarchitecture definition and RTL implementation ensuring optimal performance, power, area. Collaborate with software teams to define configuration requirements, verification collaterals etc. Work with verification teams on assertions, test plans, debug, coverage etc. Proficiency in Verilog/System Verilog Very google understanding of ASIC design methodologies Qualifications and Preferred Skills Graduate/Post Graduate/PhD in Electrical/Electronics 5-10 years hands-on experience in microarchitecture and RTL development Proficiency in developing micro-architecture from the design requirements, defining the H/W- S/W interface. In-depth understanding of MIPI CSI and DSI protocols Experience designing IP blocks for video and audio design Proficiency in Verilog, System Verilog Familiarity with industry-standard EDA tools and methodologies Experience with large high-speed, pipelined, and low power designs Excellent problem-solving skills and attention to detail Strong communication and collaboration skills Experience in designs complying to automotive functional safety will be a plus