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Posted:2 months ago| Platform: 
Work from Office
Full Time
5years experience in VLSI EDA/CAD methodology development in areas of DFT, Scan/ATPG/MBIST. Good knowledge of the DFT domain specifically on Scan logic generation, insertion methodology. Exposure to using RTL, Netlist DRC tools like Synopsys Spyglass is preferable, Strong development skills in TCL, Python.
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