Title: Workday Supply Chain Management AnalystLocation: Hyderabad (Onsite) Shift: USA EST or CST TimingsExperience Range: 5-8 years (Subject Matter Expert/Lead level preferred)We are seeking an experienced Workday SCM Analyst to join our client dynamic team. In this role, youll be at the forefront of optimizing and implementing the Workday Supply Chain Management solution for our client business. If you have strong hands-on experience with the build phase of Workday SCM and are passionate about driving supply chain operations, wed love to connect with you!Key Responsibilities:Design and maintain system configurations, evaluating modifications and enhancements.Complete necessary builds to support process workflows and changes.Collaborate with stakeholders to implement effective solutions.Drive feature release deployments and system maintenance to meet functional requirements.Investigate complex issues and generate solution options.Develop and deliver communications, training, and educational tools for end users.Provide after-hours and weekend support as needed for deadline-driven projects.Qualifications:Bachelor’s degree in Finance, Accounting, Supply Chain Management, IT, or related field.Proven experience with Workday SCM implementation and support.Strong understanding of supply chain workflows and system configuration.Excellent problem-solving, analytical, communication, and training skills.Ability to work independently and collaboratively in a team environment.Preferred Skills:Strong knowledge of IT systems, recent developments in software, relational databases, and system integrations.Excellent organizational skills and the ability to manage multiple tasks.Proficiency in MS Office (Outlook, Word, Excel, Visio, PowerPoint).Bonus:Workday Integration certification (Added advantage).If you have a passion for supply chain management and are ready to take on new challenges with a leading-edge Workday solution, apply now!

Position 1: Memory LayoutRole: Layout Design of SRAM/CAM/RF compiler memories in 5/3FF technology.Responsibilities: Development of key building blocks of memory architecture such as Row Decoder, IO, Control. Skilled in pitched layout concepts, floor planning for Placement, Power and Global Routing. Compiler level integration, verification of Compiler/Custom memories.Skills : Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc. Good problem solving and logical reasoning skills. Good communication skills requiredExperience : 4 to 7Years1. Understanding of memory architecture2. Experience in creating basic memory layouts from scratch3. Knowledge of memory peripheral blocks, including control blocks, I/O blocks, and row driversThe candidate should have over 4 years of experience with all of the above and more than 6 years of relevant industry experience overall. Additionally, they are seeking expertise in:4. Knowledge of compiler issues5. Understanding of reliability issues6. Simulation effects7. EMI (Electromagnetic Interference) considerationsPosition 2: I/O Layout Design Engineer:Roles & Responsibilities: Custom layout development on block level to Top level I/O layout for GPIO, HSTL, HCSL, VTMON, LVCMOS, DDR, LVDS etc., Need knowledge on Latchup, ESD and EM. Exposure to lower nodes N3E3nm, , 5nm etc.,SKILL: LVS/DRC/ERC/Litho Checks/Antenna/ESD-LU/Density etc. Should possess good knowledge on CMOS functionality, CMOS fabrication process, foundries and challenges in latest technology nodes.Skills : Well experienced in using industry standard EDA tools like Cadence Virtuoso, Mentor Graphics Caliber etc. Good problem solving and logical reasoning skills. Good communication skills required.Exp: Above 4 to 6 yearsLocation: Electronic City, BangaloreJoining date: 2 - 4 WeeksPosition 3: Memory Design Validation (Verification): We are looking for energetic and passionate memory design validation engineers for the development of memory compilers and custom macros of all types on the leading edge of process technology. Typically requires a minimum of 5+ years of relevant experience.Job Description SummaryContribute towards Memory Design Validation of SRAM, Multi-Ports, Register File, TCAM, and ROM memory compilers as well as custom macros in 3nm and other cutting edge process technologiesJob DescriptionContribute towards Memory Design Validation of all types of custom memory macros and memory compilersPerform functional verification, root cause design discrepancies, and help resolve themPerform signal integrity analysis, identify design weaknesses, and propose possible solutions to address themPerform transistor level simulations to check for any Power Up or Lock up issues and help resolve themPerform EM/IR analysis/simulations and evaluate impact on timing and internal marginsPerform transistor level simulations to validate timing and internal margins, identify timing characterization holes, and help resolve themPerform various QA and validation checks to ensure accurate timing and power modelsDevelop scripts to automate verification flow and data analysisSupport silicon debugs and correlation to spice modelsCoordinate with memory design leads, modelling leads, and managers to define and execute on the memory validation plan