Job Description

Develop/maintain DRC, LVS, RCX, Latchup rule decks and develop QA to meet high quality standards Develop new Pcells (symbol/layout) or enhance existing Pcells Work closely with the Design Teams, Technology Teams, and Fab groups to understand specifications and requirements Work closely with Technology department and Fab to define design rules and translate them into an accurate Calibre DRC and LVS rule decks Meet timelines and provide innovative solutions to achieve high level of satisfaction among PDK users Address change requests from the Device Design and Device Characterization groups in a consistent and effective way Demonstrate strong teamwork, communication skills and work ethics Respond effectively to design center/teams requests in a timely and consistent manner Develop and maintain component tests Your Profile You are best equipped for this task if you have: Familiar with full-custom and semi-custom design flows/design concepts Minimum 5+ years of relavent experience Expertise in developing PDK components - PV rule decks , Device libraries and techfiles Expertise in EDA tools (Calibre, Virtuoso, QRC) and their interfaces with PDK s Strong background in semiconductor device physics Strong layout and design verification experience including but not limited to Calibre: DRC, LVS, PERC, Assura QRC Good understanding of IC fabrication process and IC Design Process Good understanding of electronic circuits, layout techniques, Pcell usage and physical verification Expertise in programming/scripting languages w.r.t PDK development and QA Python, Perl, TCL, Cadence SKILL, Ruby Hands on experience with Configuration, Release and Build Management Exposure to issue tracking tools (JIRA) is a definite plus Exposure to formal QA procedures will be an added advantage Experience with MS-Office, ideally basic knowledge in working on UNIX/Linux platforms Excellent programming skills with computational thinking Proactive with good communication (assertive) and interpersonal skills Avid programmer with excellent debugging skills to diagnose and devise workarounds for PDK/flow/design issues