Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation tools Expertise in C programming Expertise with platform bring-up Expertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMM Expertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms. Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flow Expertise with different coreboot payloads like edk2, SeaBios, Tianocore etc Ability to read platform Hardware and Processor specifications to understand the coreboot mainboard porting required Good coreboot upstreaming exposure Familiar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoff Understanding of coreboot & FSP build tools and build processes Good understanding of UEFI framework concepts to port UEFI code to FSP\ Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developer s perspective. Good understanding of UEFI BIOS Boot flow. Basic understanding of Linux Kernel like software development concepts (Kconfig). Preferred resources with valid regional work permit

Expertise in embedded Linux driver / kernel development Expertise in C / C++ programming with a good understanding of object-oriented design Expertise with ALSA / ASoC driver development Expertise with audio transmission protocols like I2S / TDM, audio DAC / ADC Expertise with audio DSP firmware development Expertise with bare metal or RTOS based firmware development Good understanding of Linux fundamentals and audio fundamentals, System knowledge, System Debugging, firmware debugging using JTAG Preferred resources with valid regional work permit

: Identify training needs, develop educational curriculum or material and increasing trainees engagement with learning sessions Expert with Electronic Learning Management System and technology and have experience coordinating training courses in a corporate environment Ensure all trainees / employees develop their technical skills and knowledge and are improving in their performance Conduct individual and team skills gap analyses Develop technical training courses for all levels (beginner, intermediate and advanced) Liaise with industry experts and organize workshops and classroom-style trainings Schedule in-house educational sessions using e-learning platforms Measure improvements in employees job performance as a part of training effectiveness of each course Gather feedback from trainees and instructors and recommend suggestions to the learning process NOTE : Engineering Graduates are not considered for this position APPLY NOW Name Position Applied For Phone Email Preferred Work Location Current Work Location Current Annual Salary Expected Annual Salary Are you currently serving notice period Do you possess valid work permit for your preferred work location Are you legally eligible to work at preferred work location Attach Resume Attachments (0)

: Expertise in designing and implementing machine learning and deep learning models, focusing on Large Language Models (LLMs) and Vision Language Models (VLMs). Expertise in computer vision Expertise in working on tools like Hugging Face, LangChain Expertise in API Design for model development and optimization. Expertise in Retrieval-Augmented Generation (RAG) techniques and collaborating with vector databases. Expertise in integrating GenAI model APIs and related technologies to enhance model performance Expertise in writing and refining Python code for model deployment and development Expertise in creating user-friendly interfaces and tools for visualization and analysis as per business needs Extensive knowledge of the latest developments in natural language processing (NLP) and machine learning (ML) to implement cutting-edge solutions. APPLY NOW Name Position Applied For Phone Email Preferred Work Location Current Work Location Current Annual Salary Expected Annual Salary Are you currently serving notice period Do you possess valid work permit for your preferred work location Are you legally eligible to work at preferred work location Attach Resume Attachments (0)

: Identify training needs, develop educational curriculum or material and increasing trainees engagement with learning sessions Expert with Electronic Learning Management System and technology and have experience coordinating training courses in a corporate environment Ensure all trainees / employees develop their technical skills and knowledge and are improving in their performance Conduct individual and team skills gap analyses Develop technical training courses for all levels (beginner, intermediate and advanced) Liaise with industry experts and organize workshops and classroom-style trainings Schedule in-house educational sessions using e-learning platforms Measure improvements in employees job performance as a part of training effectiveness of each course Gather feedback from trainees and instructors and recommend suggestions to the learning process NOTE : Engineering Graduates are not considered for this position APPLY NOW Name Position Applied For Phone Email Preferred Work Location Current Work Location Current Annual Salary Expected Annual Salary Are you currently serving notice period Do you possess valid work permit for your preferred work location Are you legally eligible to work at preferred work location Attach Resume Attachments (0)

Expertise in Android Framework / HAL / driver developmentExpertise in C / C++ programming with a good understanding of object-oriented designExpertise in working on Android ArchitectureExpertise in working on Android HAL ( Audio, Graphics, Camera, Power )Expertise in working on Multimedia framework such as OpenMAX, Codec2Expertise working on compliance to CTS / VTS and support in resolving defectsExpertise in embedded systems development and debuggingPreferred resources with valid regional work permitLocation- Bengaluru,Belgrade, Penang, New York

Expertise in the x86 BIOS / UEFI FSP / coreboot development Expertise with x86 CPU/APU architectures and associated compilation toolsExpertise in C programmingExpertise with platform bring-upExpertise with standard protocols like PCIe, SPI, eSPI, ACPI, SMMExpertise with opensource coreboot project & mainboard related porting with GPIO, PCIe lanes, board fmd configs and board bring-up experience on customer platforms.Expertise on working with Intel FSP package source code and understanding of coreboot & FSP boot flowExpertise with different coreboot payloads like edk2, SeaBios, Tianocore etcAbility to read platform Hardware and Processor specifications to understand the coreboot mainboard porting requiredGood coreboot upstreaming exposureFamiliar with coreboot boot stages, upds, memory map, FSP, devicetree concept, payloads to OS bootloader handoffUnderstanding of coreboot & FSP build tools and build processesGood understanding of UEFI framework concepts to port UEFI code to FSP Working knowledge of Git for code reviews, source code management, and BIOS releases to QA. Ability to juggle tasks and respond to different teams for various requests for custom BIOS requirements. Good understanding of x86-64 architecture from BIOS developers perspective.Good understanding of UEFI BIOS Boot flow.Basic understanding of Linux Kernel like software development concepts (Kconfig).Preferred resources with valid regional work permit.

Job Specs :We are seeking a highly skilled and motivated Firmware Software Development Engineer (Power Management) to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of embedded products. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers.Desired Profile :Engineers with expertise in firmware development related to BIOS, power management and PCIeExpertise in Embedded C programmingStrong knowledge of UEFI BIOS, ACPI. AGESA knowledge is a big plusStrong knowledge of platform BIOS developmentGood knowledge SoC power management CPU / Device power states, hot-plug etcFirmware development & release process understandingPrior experience working with firmware design & developmentOS / Drivers / Software stack understanding is a plusExcellent communication and articulation skills

Engineers with expertise in security firmware development for embedded SoCsExpertise in embedded C programming, debug / review capability Good knowledge about silicon security subsystem / policy, root of trust, TPM / fTPM, WidevineGood knowledge of trusted applications and handshakeMust have working knowledge on git/gerrit , JiraWorking knowledge on Boot loader, Linux , UEFI / BIOS is a plus

Job Specs :We are seeking a highly skilled and motivated Analog Circuit Designer to join the offshore development teams of our group companies. You will work with the rapidly expanding team which focuses on the research and development of Analog / Mixed Signal IPs for Silicon Lifecycle Management, driving innovation and excellence in chip design and verification. You will work alongside a talented and dedicated group of engineers, all committed to pushing the boundaries of technology and delivering top-notch solutions to our customers.Desired Profile :- Bachelor's / Master's degree in engineering from EEE / E&C with 4+ Years of work expertise in mixed-signal or CMOS circuit design- Expertise in analog blocks like power management DC-DC convertor, LDOs or- Expertise in designing ADC / DAC/ PLLs or Experience in simulation or characterization of IO cells- Design and architect CMOS analog and mixed-signal integrated circuits- Simulate designs with state-of-the-art CAD tools- Document designs and simulation results - Experience with high-speed SERDES circuits- Knowledge of layout issues- Experience with circuit simulators (HSPICE, Spectre, etc)- Experience with Cadence Design Environment is an asset- Working knowledge of PERL and UNIX shell scripting languages is an assetWork Location : Bangalore / Hubli / Kolkata / Moscow / SFOWork Expertise : 4 - 10 yearsRewards and Benefits :We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.NOTE : Preferred resources holding valid regional s onlyLocation - Bangalore,Kolkata,US,Others

We are seeking a highly skilled and motivated STA Synthesis Engineer to join our offshore development teams . The ideal candidate will have expertise in static timing analysis (STA) to ensure the timing integrity of digital integrated circuits. Develop and execute timing constraints, ensuring compliance with design specifications and performance goals. Prepare detailed STA reports, including analysis and recommendations for improvements. Provide training and support to junior STA engineers and team membersRole & Responsibilities :- Timing Constraint Generation : Work with design and architecture teams to define and generate timing constraints that specify the desired timing requirements for the design.- STA Setup : Set up and configure STA tools (e.g., Cadence Encounter, Synopsys PrimeTime) for the analysis, including library characterization, delay models, and clock definitions.- Timing Analysis : Perform static timing analysis to evaluate setup and hold times, clock-to-q delays, and other timing metrics. Ensure that the design meets timing requirements for various corners and operating conditions (e.g., process, voltage, temperature variations).- Clock Domain Crossing (CDC) Analysis : Identify and analyze asynchronous signals crossing between different clock domains to ensure proper synchronization and to avoid metastability issues.- Multicycle Paths (MCP) and False Paths : Define and analyze multicycle paths and false paths to accurately capture the designs timing constraints.- Timing Closure : Collaborate with RTL and physical design teams to achieve timing closure by optimizing the design or constraints. Perform incremental and formal ECO (Engineering Change Order) analysis to address timing issues.- Clock Tree Synthesis (CTS) : Work with CTS engineers to ensure that the clock tree meets timing requirements and minimizes clock skew and jitter.- Post-Layout STA : Perform post-layout STA to account for parasitic capacitance and resistance effects introduced during the physical design phase. Identify and resolve timing violations and sign-off on the final timing closure.- Timing Margins : Analyze timing margins to account for variability and manufacturing process variations, ensuring robust operation.- Report Generation : Prepare detailed timing analysis reports, including timing paths, violations, and suggestions for timing optimization.- Cross-Functional Collaboration : Collaborate closely with RTL designers, physical designers, DFT (Design for Test) engineers, and verification teams to resolve timing-related issues.- Methodology Development : Contribute to the development and improvement of STA methodologies and flows to enhance efficiency and accuracy.NOTE : Preferred resources holding valid regional work permits only

Expertise in embedded C programmingExpertise in Linux Kernel programmingFirmware development expertise in Linux environmentExpertise in LDD

BE / BTech / ME / MTech in ECE with 4+ years of relevant experience in ASIC PD.Expertise in digital physical designExpertise in EDA synthesis, APR, STA tools and methodologiesExpertise in one or more of the following tools ICC, ICC2, Innovus, OlympusWorking knowledge of one or more of the following tools Primetime, Calibre, and Red hawkHands on experience of working with multi modes and multi corners STAWorking Knowledge of multiple power planes and multiple VT librariesBasic domain knowledge of EM, IR, RV analysis, Noise and Formal Equivalence VerificationGood at scripting languages PERL, TCL, shellWorked on at least 2 tape ins of moderate to high speed designs with multiple power planesDebug, fix, and validate pre- and post-silicon IP/sub-system logic issues and bugsExperience in one or more of the following circuit design fields is an advantage: clock tree optimization, Timing analysis, and Power optimizationExperience in making ECOs both Metal and logic level ecosExperience DRC and LVS cleanup of designs during sign offExposure to lower node technologies 16nm or below preferred

JOB SPECS :Identify training needs, develop educational curriculum or material and increasing trainees engagement with learning sessions.Expert with Electronic Learning Management System and technology and have experience co-ordinating training courses in a corporate environment.Ensure all employees develop their technical skills and knowledge and are improving in their performanceConduct individual and team skills gap analysesDevelop technical training courses for all levels (beginner, intermediate and advanced)Liaise with industry experts and organize workshops and classroom-style trainingsSchedule in-house educational sessions using e-learning platformsMeasure improvements in employees job performance as a part of training effectiveness of each courseGather feedback from trainees and instructors and recommend suggestions to the learning processDESIRED PROFILE :B.Sc or M.Sc in Electronics with 0-2 years of work experience as a Technical Trainer on Electronic Fundamentals or VLSI SkillsExperience in developing technical course content both for novices and experts with technologyKnowledge of web-based learning platforms and modern educational techniquesExcellent communication skills with the ability to explain technical terms using simple languageAdditional certifications in VLSI training is an added advantageProven ability to lead and motivate teamsExcellent written and verbal communication skillsStrong team player / works well in multi-discipline teamsGood interpersonal skills, reads the needs and motivations of others in order to deliver high standardsUtilize time management tools and capabilitiesMust be willing to work at training centres in Marathahalli and HSR Layout at Bangalore.